In the fabrication of semiconductor integrated circuits, semiconductor elements are integrated and laid out within a small area on a chip requiring the devices to be placed in close proximity to each other. With the continuing decrease in the dimensions and spacing of devices on integrated circuits (ICs), insulative materials are deposited to electrically isolate the various active components such as transistors, resistors and capacitors. Isolation insulative materials are typically made of silicon dioxide (SiO2).
For example, interlayer dielectric (ILD) or pre-metal dielectric (PMD) layers isolate structures from metal interconnect layers, which may require filling narrow gaps having high aspect ratios (ratio of depth to width) of five or greater. Insulative structures such as shallow trench isolation (STI) regions are also formed in recesses (trenches) within the substrate between components. Such trenches can have a width as narrow as 0.01 to 0.05 microns (μm) or smaller, and filling such narrow features can be difficult. In addition, the dielectric material must be able to withstand subsequent processing steps such as etch and cleaning steps.
Dielectric materials are typically deposited by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD). For example, in a typical STI method, a trench is etched into a silicon substrate, and the trench is filled by CVD of an oxide such as silicon dioxide (SiO2) as a conformal layer. In the trenches, the conformal layers of oxide are initially formed on the sidewalls and grow in size outward into the center of the trench to where the oxide layers meet. With high aspect ratio features, the width becomes narrower while the depth becomes much greater, it is difficult to form a void-free or seam-free gap fill using standard CVD or PECVD techniques.
High temperature processing after formation of an oxide insulating layer such as an annealing or high temperature densification step can cause a loss of oxygen from the dielectric material resulting in electrically leaking films. To reduce such effects, dielectric materials have been CVD deposited from ozone-enhanced tetraethylorthosilicate (TEOS). Although demonstrating good filling properties, such a process is slow and not cost effective.
Flowable materials such as spin-on dielectrics (SODs), spin-on glasses (SOGs), and spin-on polymers such as silicates, siloxanes, silazanes or silisesquioxanes, have been developed that generally have good gap filling properties. A silicon oxide film is formed by spin-coating a liquid solution of the silicon-containing polymer onto a surface of a substrate, baking the material to remove the solvent, and then thermally oxidizing the polymer layer in an oxygen, or steam, atmosphere at an elevated temperature of up to about 1000° C. A drawback is that high temperature treatments can degrade other structures such as aluminum or other metal wiring layer that have a low thermal tolerance. Another drawback of current methods is the high cost and time required for processing. Such products may require limited thermal budget processing where extensive densification can hurt device parameters. Consequently, lower temperature processing techniques are desired.
Therefore, it would be desirable to provide a process that overcomes such problems.